Heterojunction bipolar transistors (HBT's), e.g., as used in bipolar complementary metal-oxide-semiconductor (BiCMOS) processes, include an emitter formed as a pedestal over a planar base region (e.g., formed of silicon-germanium) that overlies a collector. The emitter is bounded on opposing sides by dielectric spacers, which overlay a portion of the base region. The base region directly under the junction with the emitter is typically referred to as an intrinsic base region, while the base region falling outside of the emitter and the spacers is referred to as an extrinsic base region, as the extrinsic base region is typically heavily doped via extrinsic doping to reduce the resistance between the base-emitter junction and the base contact. The region between the intrinsic and extrinsic regions is referred to as a link base region, and directly underlies the dielectric spacers. The length of each link base region must be carefully controlled to minimize resistance across the region while minimizing leakage currents due to the proximity of the heavily doped emitter to the heavily doped extrinsic base region. However, it has been found that the alignment of the various steps used to fabricate the various regions of the base region, the base-emitter junction, and the emitter can be difficult to control.
In one conventional process, for example, an emitter is formed by first fabricating a temporary emitter and depositing the spacers on the sidewalls of the temporary emitter. The extrinsic base region is then doped, with the temporary emitter and spacers forming a mask over the intrinsic and link base regions. After the temporary emitter is etched away, the final emitter is deposited in the cavity defined between the spacers.
It has been found, however, that the step of etching away the temporary emitter can be problematic in conventional processes. Specifically, conventional processes etch away the temporary emitter and expose the base-emitter junction through an opening defined in a patterned photoresist layer deposited over the temporary emitter. Desirably, the edges of the opening are registered over the spacers to ensure that photoresist cannot overlay any portion of the emitter. Due to the difficulty in flowing photoresist over the topography formed by the temporary emitter and spacers, as well as the rounded profiles of the spacers, proper registration of the opening can be difficult to obtain. Furthermore, as the feature widths of the emitter and spacers continue to decrease in successive technologies, proper registration of a patterned photoresist layer will become increasingly more difficult. The patterned photoresist layer covers and protects regions of a dielectric layer adjacent to the temporary emitter and spacers during the etching process that removes the temporary emitter.
Therefore, a substantial need exists in the art for an improved process for forming the emitter of a BiCMOS HBT structure, and desirably a process that eliminates the need for a photomask to etch away a temporary emitter used in the process and exposing the base-emitter junction underlying the same.